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2013-06-28 - EFM32G230FXX - d0005_Rev1.60
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Table 4.2. Alternate functionality overview
Alternate
LOCATION
Functionality
0
1
2
3
Description
ACMP0_CH0
PC0
Analog comparator ACMP0, channel 0.
ACMP0_CH1
PC1
Analog comparator ACMP0, channel 1.
ACMP0_CH2
PC2
Analog comparator ACMP0, channel 2.
ACMP0_CH3
PC3
Analog comparator ACMP0, channel 3.
ACMP0_CH4
PC4
Analog comparator ACMP0, channel 4.
ACMP0_CH5
PC5
Analog comparator ACMP0, channel 5.
ACMP0_CH6
PC6
Analog comparator ACMP0, channel 6.
ACMP0_CH7
PC7
Analog comparator ACMP0, channel 7.
ACMP0_O
PE13
Analog comparator ACMP0, digital output.
ACMP1_CH0
PC8
Analog comparator ACMP1, channel 0.
ACMP1_CH1
PC9
Analog comparator ACMP1, channel 1.
ACMP1_CH2
PC10
Analog comparator ACMP1, channel 2.
ACMP1_CH3
PC11
Analog comparator ACMP1, channel 3.
ACMP1_CH4
PC12
Analog comparator ACMP1, channel 4.
ACMP1_CH5
PC13
Analog comparator ACMP1, channel 5.
ACMP1_CH6
PC14
Analog comparator ACMP1, channel 6.
ACMP1_CH7
PC15
Analog comparator ACMP1, channel 7.
ACMP1_O
PF2
Analog comparator ACMP1, digital output.
ADC0_CH0
PD0
Analog to digital converter ADC0, input channel number 0.
ADC0_CH1
PD1
Analog to digital converter ADC0, input channel number 1.
ADC0_CH2
PD2
Analog to digital converter ADC0, input channel number 2.
ADC0_CH3
PD3
Analog to digital converter ADC0, input channel number 3.
ADC0_CH4
PD4
Analog to digital converter ADC0, input channel number 4.
ADC0_CH5
PD5
Analog to digital converter ADC0, input channel number 5.
ADC0_CH6
PD6
Analog to digital converter ADC0, input channel number 6.
ADC0_CH7
PD7
Analog to digital converter ADC0, input channel number 7.
BOOT_RX
PE11
Bootloader RX
BOOT_TX
PE10
Bootloader TX
CMU_CLK0
PA2
PC12
Clock Management Unit, clock output number 0.
CMU_CLK1
PA1
PD8
Clock Management Unit, clock output number 1.
DAC0_OUT0
PB11
Digital to Analog Converter DAC0 output channel number 0.
DAC0_OUT1
PB12
Digital to Analog Converter DAC0 output channel number 1.
DBG_SWCLK
PF0
Debug-interface Serial Wire clock input.
Note that this function is enabled to pin out of reset, and has a built-in pull
down.
DBG_SWDIO
PF1
Debug-interface Serial Wire data input / output.
Note that this function is enabled to pin out of reset, and has a built-in pull up.
DBG_SWO
PF2
PC15
Debug-interface Serial Wire viewer Output.
Note that this function is not enabled after reset, and must be enabled by
software to be used.
HFXTAL_N
PB14
High Frequency Crystal negative pin. Also used as external optional clock in-
put pin.
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